Seminds offering industry-oriented job guaranteed VLSI Analog Layout training
M. Tech / B.Tech
Minimum aggregate
Year of Graduation
Course Fee
Entrance Exam Date


Course Details
Basic Electronics, digital fundamental concepts, MOSFET, CMOS design concepts, layout concepts, stick diagrams, fabrication, timing concepts, Logic Synthesis fundamentals, floor planning, PG planning, Physical Design concepts, Low Power design techniques, CTS, routing techniques, signal integrity, etc. Training program induces 4 to 5 mini projects on 14 nm, 28nm and shell programming, vi editors, Unix operating systems.
Entrance Exam Syllabus
MOSFET fundamentals, CMOS Fabrication, Stick Diagrams and Layouts, Analog layout concepts like Module based floor plan techniques, introduction to Layout Editors, DRC/LVS, process antenna effect, Analog device and matching, Analog Layout guidelines. RC extraction and simulations, shell programming, Unix operating systems, vi editor, and 4 to 5 projects using Cadence tools.
Duration
- 16 to 18 weeks intensive training program
- Class timings: 9am to 6.30pm, six days a week.
- To secure admission, students must qualify for the entrance examination