1 st Floor, Sreenivasam Building, Image Hospital Lane, Vittal Rao Nagar, Madhapur, Hyderabad.

Physical Design

Seminds offering industry-oriented job guaranteed VLSI Physical Design training

M. Tech / B.Tech

Electronics(ECE) Electrical(EEE)

Minimum aggregate

70%

Year of Graduation

2021 & above

Course Fee

Rs: 85k -
and 18% GST

Entrance Exam Date

Test on 13th April
Batch starting from 24th April

Course Details

Basic Electronics, digital fundamental concepts, MOSFET, CMOS design concepts, layout concepts, stick diagrams, fabrication, timing concepts, Logic Synthesis fundamentals, floor planning, PG planning, Physical Design concepts,  Low Power design techniques, CTS, routing techniques, signal integrity, etc. Training program induces 4 to 5 mini projects on 14 nm, 28nm and shell programming, vi editors, Unix operating systems.

Entrance Exam Syllabus

Basic & Digital Electronics, Number systems, Combinational Circuits, Sequential Circuits, BJT, FET, CMOS, etc. General aptitude.

Duration