Seminds offering industry-oriented job guaranteed VLSI DFT training
M. Tech / B.Tech
Electronics(ECE) Electrical(EEE)
Minimum aggregate
70%
Year of Graduation
2021 and above
Course Fee
Rs: 1,00,000 /- and 18% GST
Important Dates
The current batch started; next batch dates will be updated soon
Course Details
- Design & Verification of DFT IP – Clocking, JTAG, Analog interfaces, DFT features
- Scan Insertion & ATPG – Implement scan chains, run ATPG, validate coverage
- Memory BIST (MBIST) – Insert, validate, and generate MBIST patterns
- Testability Analysis – Board-level diagnostics, block isolation, BIST integration
- DFT Timing & STA – Develop timing constraints, perform STA for test modes
- DFT Architecture & RTL – Define architecture, code RTL, SoC-level integration
- ATE Debug – Debug & resolve ATE issues for reliable execution
- DFT Verification – Ensure functional correctness & compliance
Tools & Skills Covered:
✅ Synopsys DFT Compiler, Siemens/Mentor Tessent, Cadence Modus (or equivalent)
✅ Scan Insertion, ATPG, MBIST, JTAG, STA, RTL Coding, ATE Debug
✅ Hands-on DFT Architecture, Pattern Generation & Verification
✅ Strong Problem-Solving, Debugging & Timing Closure skills
Entrance Exam Syllabus
Basic and Digital Electronics
Number Systems, Combinational and Sequential Circuits
BJT, FET, CMOS
General Aptitude
Duration
- 20 to 22 weeks intensive training program
- Class timings: 9.30am to 6.30pm, six days a week.
- To secure admission, students must qualify for the entrance examination